HyperTransport™ Consortium Announces New HyperTransport Expansion Interface: HTX™ Creates Low-latency, High-performance I/O Slot for High-Performance Systems
HyperTransport™ Technology Consortium, the nonprofit industry organization that manages and promotes low-latency HyperTransport technology, announced today that is has approved HTX™, the industrys first HyperTransport technology expansion connector specification. The new HyperTransport EATX Motherboard/Daughtercard Specification defines an interface and form factor specification for an EATX motherboard connector and HyperTransport add-in cards. The EATX motherboard is a popular architecture used in high-performance workstations, servers, embedded systems and storage systems. The new HyperTransport Consortium HTX slot standard is intended to accelerate the deployment of HyperTransport technology in the high-performance systems market by defining a standard HyperTransport expansion interface for use with popular motherboards and add-in cards.
"The new HTX connector/daughtercard specification is an important milestone for HyperTransport technology" states Brian Holden, Chairperson of the HyperTransport ConsortiumTechnical Working Group. "It gives system and subsystem manufacturers a standard way to attach HyperTransport-enabled subsystems to HyperTransport-enabled motherboards. The high-throughput, low-latency HyperTransport link is an integral part of many 64-bit motherboards and a key interprocessor link for multiprocessor systems."
"This new standard is a result of key member companys willingness to share their work on designing and building advanced server systems," notes Mario Cavalli, General Manager of the Consortium. "In particular we would like to recognize Consortium members AMD, Iwill Corp. and PathScale, Inc., for their significant contributions to the definition and validation of the HTX connector, as well as for their decision to share their work with the rest of the industry through the HyperTransport Consortium. The cooperation between AMD, Iwill, PathScale and the Consortium is a model of how individual company interests can be turned into shared community benefit using the Consortium."
"The HTX slot standard allows PathScale to leverage the low-latency, high-bandwidth characteristics of HyperTransport technology in our high performance InfiniPath™ HTX Adapter and to achieve the industry absolute lowest latency cluster computing interconnect," said Len Rosenthal, Vice President of Marketing for PathScale, Inc. "We are pleased that the Consortium agreed to make the HyperTransport HTX connector a Consortium standard. This will lead to its widespread industry adoption and will accelerate deployment of the HyperTransport technology in the high performance computing market segment."
"HyperTransport technology is a premium technology for high performance computing," said David Montgomery, Director, Technology Development for Iwill Corporation. "We have developed our advanced HTX-Pro™ HyperTransport expansion technology to support this low-latency link. Consortium-approved standard HTX™ add-in cards such as the new PathScale InfiniPath cluster interconnect that interoperate with Iwill HTX-Pro technology will help OEMs quickly assemble high performance systems and subsystems without the cost of developing proprietary motherboard designs."
The HyperTransport HTX Motherboard/Daughtercard specification defines an 8- or 16-bit HyperTransport interface with an up to 1.6 gigatransfer/second data rate (800 MHz clock rate) and includes all of the defined HyperTransport control signals including a synchronous reference clock. The connector signals include both 12V and 3.3V power signals, a SMBus interface (3.3V), optionally supports JTAG and enables the use of 4-layer motherboards and daughtercards with conventional PCB technology.
The new HTX specification is optionally compatible with the standard Extended ATX (12" x 13") motherboard form factor. The daughtercard mechanical envelop is compatible with standard PCI cards to fit in existing chassis designs. The HTX components are designed to be used in both riser-based (1U) and pedestal, rack-mount (3U and greater) and proprietary systems. The placement of the connectors are designed to exclude the possibility of accidentally inserting cards built to other known interface specification. The specification defines the mechanical locations of the connectors, pinouts, signaling conventions, mechanical specifications for the 1U riser card and the HyperTransport daughtercard, and layout rules for motherboard, riser, and daughtercard.
Information on this and other HyperTransport specifications can be downloaded for free from the HyperTransport website at: www.hypertransport.org.
About HyperTransport™ Technology
HyperTransport chip-to-chip interconnect technology is a highly optimized, high performance and low latency board-level architecture for embedded and open-architecture systems. It provides up to 22.4 Gigabyte/second aggregate CPU to I/O or CPU to CPU bandwidth in a highly efficient chip-to-chip technology that replaces existing complex multi-level buses. In addition to delivering the industry��s highest bandwidth, frequency scalability, and lowest implementation cost, the technology is software compatible with legacy Peripheral Component Interconnect (PCI), PCI-X and PCI Express technologies. HyperTransport technology delivers state-of the-art bandwidth by means of easy-to-implement Low Voltage Differential Signaling (LVDS) point-to-point links, delivering increased data throughput while minimizing signal crosstalk and EMI. It employs a packet-based data protocol to eliminate many sideband (control and command) signals and supports asymmetric, variable width data paths.
HyperTransport technology is already deployed in millions of devices used in market leading systems such as Microsoft��s Xbox, Apple��s Power Mac G5 workstations, Cisco��s routers, Apple, IBM��s, HP��s and Sun Microsystems��s servers, HP��s blade PCs, HP��s and Sharp notebooks, Cray��s and IBM supercomputers, and all PCs, servers and cluster workstations based on AMD��s Athlon® 64-based, and Opteron™, and Transmeta��s Efficeon™ processors. 2003 industry estimates from market analyst firm IDC projected 30 million HyperTransport port shipments in 2003, rising to over 200 million ports shipped in 2006.
HyperTransport technology is embedded in multiple CPU families from AMD, Broadcom, PMC-Sierra and Transmeta and it has established a significant presence in a number of key industry sectors. It is licensed on a royalty-free basis by the HyperTransport Technology Consortium. A full list of HyperTransport-based products and HyperTransport Consortium��s member companies can be found at www.hypertransport.org/products/.
About the HyperTransport™ Technology Consortium
The HyperTransport Technology Consortium is a membership-based, non-profit organization in charge of managing and promoting HyperTransport Technology. It consists of over 40 member companies, including founding members Advanced Micro Devices, Alliance Semiconductor, Apple Computer, Broadcom Corporation, Cisco Systems, NVIDIA, PMC-Sierra, Sun Microsystems, and Transmeta. Membership is open to any company interested in licensing the HyperTransport technology. It is based on a minimal yearly fee and includes the right to royalty-free use of HyperTransport technology and Intellectual Property. More information can be obtained at HyperTransport Technology Consortium��s website at www.hypertransport.org.
Consortium members have access to HyperTransport technical documents database, they may attend consortium meetings and events and may benefit from a variety of technical and marketing services, including the newly revamped, member-driven web portal, offered by the Consortium free of charge to member companies. To learn more about member benefits and on how to become a Consortium member, visit the Consortium web site at www.hypertransport.org/consortium/cons_join.cfm.
HyperTransport and HTX are licensed trademarks of the HyperTransport Technology Consortium. All other trademarks belong to their respective owners.
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